Testing electronic devices usually requires automatic test equipment (ATE) that provides data to stimulate the device inputs and compares the test results against expected data. Generally, the tester provides appropriate test signals and controls the test operations. For example, in testing a memory device, the tester, via the input/output (I/O) pins of the memory device, writes various sets of data into the memory, and reads the data from the memory. If the data read from the memory is the same as the data written into the memory, then the memory is good, i.e., functions properly. In this example, the tester provides appropriate signals to put the memory in the write or read mode as desired. The tester also compares the data read from the memory to the expected data usually provided by a test engineer since the test engineer usually provides the data written into the memory.
However, a tester for testing complex devices such as processors, especially at high-speed, are expensive, and can cost millions of dollars. Low-speed testers are less expensive, but require longer test time. A built-in self-test (BIST) mechanism enables a device to test itself, but usually requires circuits including a self-test controller that add significant complexity to the device and also use resources that can otherwise be used for other purposes. Testing packaged devices is easier to handle than testing the device at the wafer level, e.g., pre-packaged, but can be expensive because of the packaging costs. For example, if the device is bad, then the device package is wasteful. Testing at the wafer level commonly requires a clean and controlled environment. Depending on how the tests are developed, a particular test may detect a design flaw, a manufacturing defect, an operation defect, etc. High-coverage testing can also be expensive. However, leaving a defect to be found when the products have been shipped to customers usually increases the cost significantly, and may result in losing customers. Recently, multiprocessors are commonly found on a chip, and they need to be tested efficiently in a relatively less expensive manner.
Based on the foregoing, it is desirable that mechanisms be provided to solve the above deficiencies and related problems.